Cadence Announces Shared Enterprise Data and AI Platform

SAN JOSE, CA, September 14, 2022 – Cadence Design Systems, Inc. On the delivery of the Cadence Joint Enterprise Data and AI (JedAI) platform, enabling a generational shift from single-engine, single-engine algorithms in Electronic Design Automation (EDA) systems to algorithms that leverage big data and artificial intelligence (AI) to optimize multiple operating processes for multiple engines Via the entire SoC design and validation flow. The Cadence JedAI Platform allows engineers to extract actionable intelligence from vast amounts of chip design and validation data, opening the door to a new generation of AI-driven design and validation tools that dramatically improve throughput, robustness, performance, and space (PPA). With the Cadence JedAI Platform, Cadence unites big data analytics across its proprietary AI platforms — Verisium validation, Cadence Cerebrus implementation, and Optimality optimization — as well as third-party silicon lifecycle management systems.

With the new Cadence JedAI platform, engineers can seamlessly manage both structured and unstructured data, including:

  • design data Such as waveforms and coverage in functional validation, physical layout forms, timing/power/voltage/variance analysis reports, RTL design, netlist and SDC specification in design implementation
  • Workload data Such as runtime, memory usage, and disk space usage, as well as metadata about the inputs for each task and the dependencies between them
  • Workflow data Like the tools and methodology used to create the design

The Cadence JedAI platform makes it easy to manage the design complexities of emerging consumers, supercomputing, 5G communications, automotive and mobile apps, and more. Customers using Cadence Analog/Digital/PCB implementation, verification and analysis software – and even third-party applications – can use the Cadence JedAI platform to consolidate and analyze all of their big data analytics. Furthermore, the new platform is cloud-enabled, providing highly scalable computing resources in a secure design environment from major cloud service providers.

“To enable the semiconductor industry to continue on its robust growth path, it is critical that the chip design process becomes more efficient to keep pace with market demands,” Pat Moorhead, CEO, Founder and Chief Analyst, Moor Insights & Strategy. “Improving design processes through artificial intelligence and big data analytics creates a clear benefit for engineering teams who can now extract essential knowledge from the vast amounts of EDA data at their fingertips. The new Cadence JedAI platform is designed to provide users with intelligent, automated design insights and the ability to scale productivity The engineering team is great.”

Customers using the Cadence JedAI platform can access the following benefits:

  • Highly scalable: Enterprise-wide scalability and security, enabling design optimization across multiple processes, tools, users, designs, and EDA scopes
  • Practical intelligence: Quickly compares metrics across different versions of the same build and/or multiple builds, providing recommended actions to improve PPA and increase validation coverage.
  • Workflow management technology: Integrated workflow management capability allows users to efficiently capture chip design methodologies and automatically transfer design data between projects through data connectors.
  • Custom Analytics: Provides open, industry-standard user interfaces such as Python, Jupyter Notebook, and REST APIs, allowing designers to create custom analytics applications

“Achieving design goals requires a variety of analysis and significant design resources,” he said. Satoshi Shabatani, Director, Digital Design Technology Division, Joint R&D Division, Renesas. “By using the Cadence JedAI platform’s big data analytics, we can quickly retrieve necessary information and solve bottleneck issues. We continue to expand our AI collaboration with Cadence and effectively use our broad data to our advantage to improve PPA as well as throughput throughout the design and verification phases.”

“As the volume and complexity of chip design has dramatically increased over the past decade, the volume of design and validation data has also increased with it,” Dr. Venkat Thanvantry, Vice President of Artificial Intelligence Research and Development at Cadence. “Previously, we saw that once a chip design project was completed, valuable data was deleted to make way for the next project. There is valuable information in the legacy data, and the Cadence JedAI Platform makes it easier for engineering teams to access these lessons and apply them to future designs to deliver optimal engineering throughput and PPA and in Ultimately, high-quality product results are predictable.”

The Cadence JedAI platform supports the company’s intelligent system design strategy, which enables broad-based intelligence for design excellence. For more information, please visit the website www.cadence.com/go/jedaipr.

About the rhythm

Cadence is a pivotal leader in electronic systems design, based on more than 30 years of experience in computational software. The company applies its core intelligent system design strategy to deliver software, hardware, and intellectual property that turns design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to panels to complete systems for the most dynamic market applications, including supercomputing, 5G, automotive, mobile, aerospace, consumer, industrial, and healthcare. . For eight years in a row, Fortune has ranked Cadence among the 100 Best Companies to Work For. Learn more through cadence.com.


Source: rhythm

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